Wednesday, August 31, 2011

Multiplexers


Multiplexing means transmitting a large number of information units over a smaller number of channels or lines. A digital multiplexer is a combinational circuit that selects binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines. Actually there are 2^n input lines and n selection lines whose bit combinations determine which input is selected.

As an example we will discuss about a 4-line to 1-line multiplexer. Each of the four input lines, I0 to I3 is applied to one input of an AND Gate. Selection lines S1 and S0 are decoded to select a particular AND Gate. The truth table (shown below) lists the input to output path for each possible bit combination of selection lines. To explain the circuit operation let us consider the condition when S1S0=10. The AND Gate associated with input I2 has two of its inputs equal to 1 and the third input connected to I2. The other three AND Gates have at least one input equal to 0, which makes their output equal to 0. The OR Gate output is now equal to the value to the value of I2. A multiplexer is also known as a data selector, as it selects one of many inputs and steers the binary information to the output line.



Sunday, August 28, 2011

Encoder Circuit



An encoder is a digital function that produces a reverse operation from that of a decorder. The main difference between a decorder and an encoder is that a decorder has n number of input and 2^n number of output lines or channels. On the other hand an encoder has 2^n number of inputs lines and n number of outputs lines or channels. As example we can say about octal to binary encoder which consists of eight inputs and three outputs lines or channels. It is simply constructed with OR gate whose inputs can be determined from the truth table. The low order output Y0 is 1 if the input octal digit is odd. Output Y1 is 1 for octal digits 2, 3, 6 and 7. Output  is 1 for octal digits 2, 3, 6 and 7. Output Y2 is a 1 for octal digits 4, 5, 6 or 7. It is seen that input I0 is not connected to any OR gate, the binary output must be all 0’s in this case. All the 0’s output is also obtained when all inputs are all 0’s.

Friday, August 26, 2011

Decorder


In digital communication system there is a common name (decorder and encoder) to transfer data to desire position. In digital electronics we use decorder and encoder for this purpose. To simply speaking we use encoder to collect data of from a large number of channels or lines and transmitted as a few number of channels or lines. On the other hand we use decorder to collect the data that is transmitted by the encoder by a few number of channel or line and then distributed it to greater number of channels or lines (as required by the authority).


Discrete quantities of information are represented in digital system with binary codes.A binary code of n bits is capable of representing up to 2^n distinct elements of the coded information.A decorder is a combinatinal circuit that converts binary information from n inputs lines or channels to a maximum of 2^n unique lines.If the n-bit decoded information has unused or don’t-care combinations, the decorder output will have less than 2^n outputs.

Now we will try to construct a 3 to 8 line decorder. As mentioned earlier that, if a decorder has 3 input lines, it can handle data up to 2^3 or 8 output lines. Let we represent inputs as A0, A1 and A2 and outputs as D0, D1, D2, D3, D4, D5, D6 and D7.

Truth Table



     Inputs
   A0   A1     A2 
    Outputs
D0 D1 D2 D3 D4 D5 D6 D7    

    0      0       0    
1   0  0   0   0  0  0   0
    0      0       1
0   1  0   0   0  0  0   0
    0      1       0
0   0  1   0   0  0  0   0
    0      1       1
0   0  0   1   0  0  0   0
    1      0       0
0   0  0   0   1  0  0   0
    1      0       1
0   0  0   0   0  1  0   0
    1      1       0
0   0  0   0   0  0  1   0
    1      1       1
0   0  0   0   0  0  0   1



Thursday, August 25, 2011

Full Subtractor Circuit


The subtraction of two binary numbers may be accomplished by taking the complement of the subtrahend and adding it to the minuhend. By this method, the subtraction operation becomes an addition operation requiring full adders for its machine implementation. It is possible to implement subtraction with logic circuits in a direct manner. By this method, each subtrahend bit of the number is subtracted from its corresponding significant minuhend bit to form a different bit. If the minuhend bit is smaller than the subtrahend bit, a 1 is borrowed from the next significant position. The fact that a 1 has been borrowed must be conveyed to the next higher pair of bits by means of a binary signal coming out (output) of a given stage and going into (input) the next higher stage. It is same for the half-adder and full-adder, half-subtractor and full-subtractor circuits.

Half-Subtractor Circuit


Summery

The subtraction of two binary numbers may be accomplished by taking the complement of the subtrahend and adding it to the minuhend. By this method, the subtraction operation becomes an addition operation requiring full adders for its machine implementation. It is possible to implement subtraction with logic circuits in a direct manner. By this method, each subtrahend bit of the number is subtracted from its corresponding significant minuhend bit to form a different bit. If the minuhend bit is smaller than the subtrahend bit, a 1 is borrowed from the next significant position. The fact that a 1 has been borrowed must be conveyed to the next higher pair of bits by means of a binary signal coming out (output) of a given stage and going into (input) the next higher stage. It is same for the half-adder and full -adder, half-subtractor and full-subtractor circuits.

Tuesday, August 16, 2011

Full Adder Circuit


A Full Adder is a combinational circuit that performs the arithmetic sum of three input bits. It consists of three inputs and two outputs. Three of the input variables can be defined as A, B, Cin and the two output variables can be defined as S, Cout. The two input variables that we defined earlier A and B represents the two significant bits to be added. The third input Cin represents the carry bit. We have to use two digits because the arithmetic sum of the three binary digits needs two digits. The two outputs represents S for sum and Cout for carry.

For designing a full adder circuit, two half adder circuits and an OR gate is required. It is the simplest way to design a full adder circuit. For this two XOR gates, two AND gates, one OR gate is required. 

Half Adder Circuit


Half adder circuit is essential circuit for computer hardware components. The device which can calculate some integer or floating point wants half adder circuit. It is used for performing mathematical calculation in hardware. In computer, calculator and other counting device use half adder. It is the great invention for the scientists to sum the numbers easily. It consists of a XOR gate and two input pin and output sum and carry. Numbers of n bit are connected serially to add numbers.


Truth Table 

        Input A
        Input B
        Output C
        Output S
          0
           0
            0
           0
          0
           1
            0
           1
          1
           0
            0
           1
          1
           1
            1
           0

Monday, August 1, 2011

Universal Gate NOR




Summery
Earlier we have mentioned about the universal logic gate NAND. Now we will try to discuss about another logic gate NOR. It is just opposite to the OR gate. Like universal gate NAND, NOR gate can also be used to design of various logic gates. In this topic we will see the implementation of various logic gates with NOR gate. And we will also observe the verification of truth tables of those logic gates.
Normally to do this quad-2 input NOR gate (HD74HC02P) is used. The output is taken from the LED (Light Emitting Diode). One thing that should be noted that,  DC power supply must be equal to or less than +5V. Because otherwise, there is a chance to damage of the IC. 

Implementation with NOR gate
OR Gate

Truth Table


        Input A
      Input B
    Output Q
             0
         0
          0
             0
         1
          1
          1
         0
          1
          1
         1
          1
     Figure: Truth Table of NOR Implementation of OR Gate