Previously we have discussed about multiplexer circuit, decorder, encoder, half adder, full adder, half subtractor, full subtractor and universal gate. Now let we try to discuss about something else. So in this topic we will try to discuss about Combinational Logic Implementation. To write more specifically we will discuss about the implementation of a full adder circuit with a decorder and two OR Gates.
To do this at first we need to review the truth table of Full Adder circuit.
Inputs a b c | Outputs C S |
0 0 0 | 0 0 |
0 0 1 | 0 1 |
0 1 0 | 0 1 |
0 1 1 | 1 0 |
1 0 0 | 0 1 |
1 0 1 | 1 0 |
1 1 0 | 1 0 |
1 1 1 | 1 1 |
Fig: Truth table of Full Adder Circuit
From the truth table we have been found that
S(a,b,c)=sum(1,2,4,7)
C(a,b,c)=sum(3,5,6,7)
